1. Field of the Invention
The present invention provides a conductive structure and a method for forming the same, and more particularly, to a conductive structure for a semiconductor chip and a method for forming the conductive structure.
2. Descriptions of the Related Art
Flip chip packaging has gradually become the mainstream process for semiconductor packaging. According to flip chip bonding technology, a chip is flipped over upside down, and then the bumps that are formed on the chip are used as bridges for an electrical connection between the chip and circuit of a counter substrate. Therefore, the quality of the bumps used as conductive structures is critical for the overall performance of semiconductor package products.
FIGS. 1A to 1F illustrate conventional bump structures and steps of forming the same. First, as shown in FIG. 1A, the chip 11 consists of a substrate 111, a pad 112 and a passivation layer 113. The passivation layer 113 is formed with a first opening 113a to partially expose the pad 112.
To attach the bump to the pad 112 successfully, an Under Bump Metal (UBM) 121 must be formed on the passivation layer 113 in advance as shown in FIG. 1B. The UBM 121 is electrically connected to the pad 112 through the first opening 113a formed in the passivation layer 113. Thus, the UBM 121 not only has the function of bonding the bump to the pad 112, but also serves as a conductive media between the bump and the pad 112.
Then, as shown in FIG. 1C, an insulating layer 122 is formed on the UBM 121, and depending on the design requirements, a photoresist is then used to appropriately form a second opening 122a above the pad 112 through patterning for use in a subsequent bump implanting step.
Therefore, depending on the design requirements, a bump 123 is formed within the second opening 122a of the insulating layer 123 through electroplating or evaporating or some other process and is electrically connected to the pad 112 through the UBM 121, as shown in FIG. 1D.
Upon completion of the step of implanting the bump 123, some portions of the insulating layer 122 have become unnecessary, so these unnecessary portions of the insulating layer 122 are removed as shown in FIG. 1E.
Finally, to block electrical connection between the wafer components in the substrate 111 and external components via the UBM 121, portions of the UBM 121 other than the portion under the bump 123 are removed through UBM etching as shown in FIG. 1F, thus, completing the bump structure of the conventional chip 11.
However, in the above manufacturing process, the insulating layer 122 and the second opening 122a defined therein are only used as pre-steps for the subsequent step of implanting the bump 123. Therefore, the insulating layer 122 becomes unnecessary after the bump 123 is formed. This makes it difficult to make proper use of the insulating layer 122 and leads to several additional procedures and associated costs: the photoresist is used to remove the insulating layer 122, and then the residual photoresist or foreign matters on the surface of the chip 11 must be cleaned off before removing portions of the UBM 121.
Furthermore, the UBM 121 usually consists of two metal layers. Conventionally, the two metal layers are used as adhesion layers between the pad 112 and the bump 123 by virtue of conductivity of the metals and the different element properties of the metal layers. However, the conventional UBM 121 bonds to the pad 112 and the bump 123 using only the surfaces of the two metal layers. Consequently, in the case of poor quality control of the two metal layers, cracks easily occur between the UBM 121 and the bump 123 or between the UBM 121 and the pad 112 to result in an instable conductive effect of the bump 123, which will adversely affect the working performance of the whole chip 11.
Accordingly, it is important to improve the quality of the bump and decrease the cost of the overall manufacturing process.